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ムーアの法則以降の新しい半導体メモリとトランジスタの技術動向
https://shonan-it.repo.nii.ac.jp/records/601
https://shonan-it.repo.nii.ac.jp/records/6019d2bc2fb-0b1f-4e6e-b03e-3eaa1b262973
名前 / ファイル | ライセンス | アクション |
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Item type | 紀要論文 / Departmental Bulletin Paper(1) | |||||
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公開日 | 2017-01-27 | |||||
タイトル | ||||||
タイトル | ムーアの法則以降の新しい半導体メモリとトランジスタの技術動向 | |||||
タイトル | ||||||
言語 | en | |||||
タイトル | Trend of novel semiconductor memory and transistor for post Moore’s low | |||||
言語 | ||||||
言語 | jpn | |||||
キーワード | ||||||
言語 | en | |||||
主題Scheme | Other | |||||
主題 | LSI, 3 dimensional transistor, FinFET, system LSI, MRAM, flash memory | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | departmental bulletin paper | |||||
著者 |
渡辺, 重佳
× 渡辺, 重佳× 廣島, 佑× 玉井, 翔人× 横田, 智広× 佐藤, 匠× WATANABE, Shigeyoshi× HIROSHIMA, Yu× TAMAI, Shoto× YOKOTA, Tomohiro× SATO, Takumi |
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抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | Trend of novel semiconductor memory and transistor for post Moore’s low have been described. For promising candidates for replacing presently available planar transistor are 3 dimensional transistors such as FinFET and SGT. Next candidate of FinFET is novel FinFET technology featured with plural number of trench depth with only one process step. Promising candidates of next generation memory are stacked type NAND flash memory and stacked type NAND new type memory which use SGT and BiCS technology. Especially, stacked type NAND new type memory has potential which replace not only high performance memory but also presently available system LSI. | |||||
書誌情報 |
湘南工科大学紀要 en : Memoirs of Shonan Institute of Technology 巻 50, 号 1, p. 39-47, 発行日 2016-03-31 |
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出版者 | ||||||
出版者 | 湘南工科大学 | |||||
書誌レコードID | ||||||
収録物識別子タイプ | NCID | |||||
収録物識別子 | AN10400308 | |||||
論文ID(NAID) | ||||||
内容記述タイプ | isIdenticalTo | |||||
内容記述 | 40020787531 |